We're a team that's worked across ML, silicon, product, and hardware design — now building the future of PCB design.

EE + CS + Math background. Previously: ML at Apple, Meta. 2025 D.E. Shaw Latitude Fellow (1 of 47 nationwide). Ex-NASA RockSat-C program. Research in vision-language models for robotics. Previously co-founded SpawnLabs. Leads product direction and ML at Trace.

Built an FPGA-based LLM accelerator. Previously: ASIC Verification Engineer at NVIDIA. Fmr. President of IEEE at Howard University. Started the first officially credited PCB course (HOPE) at Howard. Leads core technical architecture at Trace.

Background in semiconductors, FPGAs, and hardware design languages. Previosly: Research at Howard on inverse kinematics for two-joint embedded systems. Experience with embedded C/C++ for ARM microcontrollers and protocols like SPI, I²C, and CAN. Focuses on the electrical and physics layer of Trace.