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Matched Length Groups: Length-Matching Whole Buses, Not Just Traces

Matched Length Groups: Length-Matching Whole Buses, Not Just Traces
TL;DR

Matched Length Groups let you group a set of nets and length-match them to a shared target - the longest member, an explicit length, or a matched-length DRC constraint - with a configurable tolerance and optional propagation-delay (time-domain) matching. A member signal can span multiple physical nets, so signals split by a series termination resistor are summed and matched as one. A live overlay shows each net's delta, tuning any member snaps it to the group target, and DRC flags anything out of range. You can also just ask the AI: "length-match the DDR data lines."

High-speed interfaces live and die by timing. DDR, USB, PCIe, and parallel buses all require the traces in a group to arrive within a tight window of each other. The way most EDA tools handle this is trace-by-trace: you tune one net, read off its length, then manually tune every other net to that number. It works, but it is tedious and error-prone, and it falls apart the moment a signal passes through a series termination resistor and becomes two physical nets.

The Problem With Per-Trace Tuning

Interactive length tuning - inserting serpentine meanders to add length - is the right primitive, but on its own it only operates on a single trace or a single differential pair. There is no notion of "these sixteen nets belong together and must match." You end up copying a target length between nets by hand, and re-doing it every time the layout shifts.

What a Matched Length Group Is

A Matched Length Group is a first-class object saved with your board. It ties a set of nets together and matches them to a shared target:

  • Longest member (the default) - every net matches the longest one, so you never type a target.
  • Explicit length - match everything to a number you set.
  • From a DRC rule - use the matched-length constraint you already defined.

Tolerance is configurable, and matching can be by physical length or by propagation delay (time domain). The group is editable in the Properties panel, and the Design Rule Checker flags any member that drifts out of tolerance.

Signals Split by Series Resistors

A signal that runs source pin to series resistor to destination pin is, electrically, two physical nets. Trace lets a single group member span both: the group sums their routed length - including the length added by vias (using stackup height) and pad-to-die length - and matches the whole path. That is the case that breaks naive net-by-net length matching, and it is handled directly.

How to Use It

Select the traces or nets you want to match, then choose Route to Create Matched Length Group (also in the track-tuning toolbar), or right-click the nets in the Net Inspector. A live overlay shows each signal's current length, the shared target, and its delta - green when in tolerance, red when out. Tuning any member net with the length tuner automatically uses the group's target, so meandering matches the trace to the group. And because Trace is AI-native, you can skip the menus entirely and prompt the assistant: "match the lengths of the DDR3 DQ group within 5 mil, accounting for the series resistors."

— Ayomide Caleb Adekoya
Co-Founder & CEO, Trace